Neuromorphic hardware systems and chips are a groundbreaking class of computer processors engineered to mimic the efficiency and structure of the human brain. Unlike conventional computers, which separate processing and memory (the von Neumann bottleneck), neuromorphic chips integrate these functions by using networks of artificial neurons and synapses, eliminating the energy-intensive transfer of data. These chips rely on Spiking Neural Networks (SNNs), where processing is event-driven—meaning the artificial neurons only consume power when an information "spike" is received—leading to drastically lower energy consumption and latency. This brain-inspired architecture, demonstrated in chips like Intel's Loihi, SpiNNaker, and BrainScaleS, makes them exceptionally well-suited for demanding, real-time AI tasks requiring on-chip learning and adaptation, particularly in resource-constrained environments such as autonomous vehicles, robotics, and edge computing devices.
SpiNNaker 2
TU Dresden · 2021A next-generation system designed to scale to 10 million cores with a >10x improvement in energy efficiency. Each chip integrates 152 ARM Cortex-M4F cores and includes dedicated hardware accelerators for both neuromorphic and standard machine learning operations, making it a truly hybrid platform.
BrainScaleS-2
Heidelberg U. · 2022A single-chip system that refines the accelerated mixed-signal approach with a 1,000-fold acceleration factor. It features a 'hybrid plasticity' architecture, combining analog emulation of fast neural dynamics with a programmable digital processor (PPU) for executing complex learning rules.
HiAER-Spike
UC San Diego · 2023A massive reconfigurable neuromorphic system capable of simulating 160 million neurons and 40 billion synapses across a rack of FPGA servers. It utilizes Hierarchical Address Event Routing (HiAER) to manage massive connectivity and is integrated with the Neuroscience Gateway (NSG) for remote access.
Dynap-SE2
UZH/ETH/SynSense · 2024A mixed-signal research chip for ultra-low-power, real-time sensory processing. It features 1,024 analog spiking neurons whose circuits operate in the subthreshold regime, resulting in power consumption below a milliwatt.
NorthPole
IBM Research · 2023A neural inference architecture that intertwines compute with memory on a single chip to eliminate the von Neumann bottleneck. It is fully digital, fabricated on a 12nm process, and optimized for 8-bit, 4-bit, and 2-bit low-precision operations.
NeuRRAM
UCSD / Stanford (Gert Cauwenberghs, Philip Wong) · 2022A compute-in-memory chip based on resistive random-access memory (RRAM). It supports diverse model architectures including CNNs and RNNs, allowing for data-parallel inference with high energy efficiency by performing analog matrix-vector multiplication directly within memory arrays.
Akida
BrainChip · 2022The world's first commercially available neuromorphic processor for edge AI. It is a fully digital, event-based Neuromorphic System-on-Chip (NSoC) where pre-trained networks are mapped onto a physical fabric of reconfigurable neuron cores. It supports on-chip, one-shot learning.
Loihi 2
Intel Labs · 2021An architectural evolution fabricated using a pre-production Intel 4 process. It introduces fully programmable neuron models and support for 'graded spikes,' which carry integer payloads, enhancing numerical precision while maintaining the efficiency of event-based communication.
Micro-Caspian (µCaspian)
ORNL (Oak Ridge) · 2020A low-cost, minimal size, weight, and power (SWaP) neuromorphic platform designed for edge deployment. It uses a Lattice iCE40 UltraPlus FPGA to implement an event-driven architecture with fixed-function LIF neurons, specifically optimized for control tasks and evolutionary training algorithms like EONS.
SpiNNaker
U. Manchester · 2019A massively parallel supercomputer built from over one million general-purpose ARM968 processor cores. It is designed to provide a flexible platform for neuroscientists to simulate extremely large-scale spiking neural networks in biological real-time, which is critical for applications like neurorobotics.
DynapCNN
SynSense AG · 2019A fully digital, event-driven processor specifically optimized to accelerate Spiking Convolutional Neural Networks (SCNNs). It contains one million spiking neurons and leverages in-memory computing to achieve extremely low power consumption for ultra-low-latency 'always-on' vision applications.
Braindrop
Stanford / Yale / JHU (Kwabena Boahen) · 2019A mixed-signal neuromorphic system designed to be programmed at a high level of abstraction using the Neural Engineering Framework (NEF). It uses analog circuits for neuronal computation and digital circuits for communication, optimizing for extreme energy efficiency.
Tianjic
Tsinghua U. · 2019A novel 'hybrid-paradigm' chip designed to efficiently support both computer science-oriented ANNs and neuroscience-oriented SNNs on a single, unified architecture. Its reconfigurable cores allow for hybrid models that leverage the strengths of both AI paradigms.
Loihi
Intel Labs · 2018A fully digital, asynchronous manycore research processor with 128 neuromorphic cores, each containing a microcode-programmable learning engine. This key feature allows researchers to implement and test a wide variety of spike-timing-based learning rules directly on the hardware.
BrainScaleS-1
Heidelberg U. · 2016A wafer-scale neuromorphic system that uses analog circuits to physically emulate neuron and synapse dynamics at an acceleration factor of up to 10,000 times biological real-time. This extreme acceleration enables the study of long-term biological processes like learning and plasticity.
Neurogrid
Stanford University · 2014A neuromorphic system that simulates large-scale biological simulations in real time.
TrueNorth
IBM Research · 2014A landmark achievement as the first chip to contain one million programmable neurons, developed under the DARPA SyNAPSE project. It consists of 4,096 neurosynaptic cores in a 2D mesh and operates under a Globally Asynchronous, Locally Synchronous (GALS) paradigm, designed for extreme energy efficiency in inference tasks.
CogniMem CM1K
General Vision · 2011A fully parallel silicon neural network chip featuring 1024 neurons working in parallel. It uses Radial Basis Function (RBF) and K-Nearest Neighbor (KNN) logic for high-speed pattern recognition and classification without a standard CPU clock dependency.
Neuromorphic software frameworks are the essential programming bridge that allows developers to design and deploy efficient, brain-inspired algorithms—namely Spiking Neural Networks (SNNs)—onto specialized neuromorphic hardware. Unlike traditional software that uses continuous data and sequential instructions, these frameworks provide tools and APIs to work with the event-driven, asynchronous communication characteristic of spiking neurons and to leverage synaptic plasticity for on-chip learning. Key examples include Intel's Lava (an open-source framework designed to be hardware-agnostic), PyNN (a simulator-independent language for SNN model specification), and deep learning extensions like snnTorch (which integrates SNNs with the PyTorch ecosystem), all of which are crucial for overcoming the complexities of programming massively parallel, bio-inspired architectures to fulfill the promise of ultra-low-power AI.
BrainCog
Brain-inspired Cognitive Intelligence Lab at The Institute of AutomationAn open-source simulator that models brain activity and has brain simulation. It can simulate both single and multiple brains at the same time. It has 50+ spiking neural network algorithms for learning rules, processing, decision making, and more.
Brian
Academic/CommunityAn open-source simulator designed to 'save the time of scientists,' notable for its feature that allows users to define neuron and synapse models directly using mathematical differential equations as text strings.
Fugu
Sandia National LaboratoriesA spiking neural network library focused on producing composable, scalable, and portable algorithms. It uses 'Bricks' (neural circuits) to generate platform-agnostic networks, which are then compiled to various execution backends, serving as a high-level intermediate representation.
GeNN
CCNR group at the University of Sussex BrightonAn open-source high-performance simulation library designed for spiking neural networks. It typically uses an NVIDIA GPU(s) to speed up the simulation speed. Uses a C-like language called GeNNCode to describe and customize networks.
Lava
IntelAn open-source, platform-agnostic framework designed to bridge development between conventional hardware (CPU/GPU) and specialized neuromorphic chips (Loihi), built around the abstraction of communicating 'Processes'.
MetaTF
BrainChip Inc.A proprietary software suite that integrates with the TensorFlow/Keras ecosystem, providing tools to convert pre-trained Artificial Neural Networks (ANNs) into efficient Spiking Neural Networks (SNNs) for deployment on the Akida processor.
Nengo
Applied Brain Research Inc.An open-source python package that's designed to easily build and iterate through multiple kinds of neural network models. This library supports both spiking and non-spiking neural networks, and is highly customizable.
NEST
The NEST InitiativeA free, open-source simulator engineered for highly efficient, large-scale, and structurally complex networks of spiking neurons, prioritizing dynamics and size over detailed single-neuron morphology.
NIR
Institute of Neuromorphic EngineeringAn intermediate representation for neuromorphic models. It allows for the seemless conversion between models made for different chips and simulators.
Norse
Electronic VisionsA plug-and-play library for spiking neural networks. This library helps bridge the gap between Neuromorphic research and practical code.
py-spinnaker2
SpiNNcloud / TU DresdenA light-weight Python interface for running experiments on the SpiNNaker2 neuromorphic chip. It allows high-level SNN definition (PyNN-inspired) and low-level experiment control via an 'experiment runner' and supports the Neuromorphic Intermediate Representation (NIR).
PyNN
NeuralEnsemble InitiativeA simulator-independent language that provides a single, common API for describing neural network models, which are then translated for execution on various backend simulators and neuromorphic hardware.
Rockpool
SynSenseAn open-source package that extends PyTorch and Jax's capabilities. It's used for designing and evaluting recurrent networks with continous-time dynamics and event-driven dynamics. It's able to be used on SynSense's Xylo™ platform, the DYNAP-SE2, and normal CPU and GPU hardware. This has a NIR export.
Samna
SynSenseThe core developer interface and runtime environment for all SynSense neuromorphic hardware, providing a low-level API for device control, real-time event stream filtering, and deployment of models from higher-level tools like Sinabs.
SANA-FE
UT Austin and Sandia National LabsA neuromorphic architecture simulator built to be flexible. SANA-FE is designed to predict hardware metrics at the architecture level in time-step-based chips.
Sinabs
SynSenseAn open-source deep learning library for SNNs built natively on PyTorch, focusing on fast training, simplicity, and weight transfer from ANNs, with tools for deployment onto SynSense hardware.
snnTorch
UCSC Neuromorphic Computing GroupAn open-source package that extends PyTorch's capabilities to spiking neural networks. It focuses on gradient-based learning using surrogate gradient functions, treating spiking neurons as recurrent units deeply integrated with PyTorch's autograd for GPU acceleration. It supports the Neuromorphic Intermediate Representation (NIR) for hardware export.
SpikingJelly
Multimedia Learning Group at Peking University and Peng Cheng LaboratoryAn open-source package that extends PyTorch's capabilities to spiking neural networks. It has multiple learning rules, but focuses on gradient-based learning.
SpiNNman
The University of Manchester (SpiNNaker Team)A core, low-level component of the SpiNNaker software stack responsible for managing the hardware's complexity, including the compilation, execution, and mapping of high-level network descriptions (like those from sPyNNaker/PyNN) onto the million-core SpiNNaker machine.
SpiNNman2
The University of Manchester (SpiNNaker Team)A core, low-level component of the SpiNNaker software stack responsible for managing the hardware's complexity, including the compilation, execution, and mapping of high-level network descriptions onto the SpiNNaker machines.
Spyx
University of Cambridge and Sussex AIA flexible open-source library build on top of DeepMind's Haiku package. It's primary goal is to match both the flexibility, extensibility, and performance offered by PyTorch-based spiking neural network libraries.
STACS
Sandia National Laboratories (SNL)A highly parallel spiking neural network simulator built on the Charm++ framework. It is designed to scale neural simulations across distributed high-performance computing (HPC) clusters, focusing on asynchronous execution and handling complex synaptic connectivity at scale.
SuperNeuro
Oak Ridge National Laboratory (ORNL)A Python-based neuromorphic simulator designed for speed and scalability. It features two distinct modes: 'SuperNeuroMAT' (Matrix-based) for high-performance homogeneous networks using vectorization, and 'SuperNeuroABM' (Agent-Based Modeling) for simulating heterogeneous populations of neurons with diverse mechanisms.